This invention relates to a control circuit for an electronic timepiece, and in particular, to a control circuit for producing a signal representative of the timing rate of the high frequency time standard signal produced by the oscillator circuitry of the electronic timepiece, and the amount that the timing rate, produced by the oscillator circuitry, is adjusted in order to effect an accurate display of time.
In order to permit low frequency time signals, produced by the divider circuitry in an electronic timepiece, to be accurately adjusted, frequency adjustment circuits for varying the frequency or timing rate of the electronic timepiece circuitry have been provided. Such frequency or timing rate adjustment circuitry is utilized with divider circuitry formed from a plurality of series-connected divider stages that are utilized to divide down a high frequency time standard signal produced by an oscillator circuit including a vibratory time standard, and produce a low frequency time signal having a timing rate equal to the frequency rate of the signal produced by the oscillator circuitry divided down by the division ratio determined by the number of divider stages. Frequency adjustment circuitry is utilized to adjust the divided down low frequency time signal, produced by the divider circuitry, by varying the division ratio of the divider stages.
Accordingly, at the time that the electronic timepiece is assembled, the frequency adjustment circuitry, which usually takes the form of a binary logic memory, can be preset and thereby automatically adjust the low frequency time signal produced by the divider circuitry. Alternatively, the frequency adjustment circuitry can be set by the actual operation of the timepiece, and automatically adjust the timing rate of the low frequency time signal produced by the divider circuitry. Therefore, once the assembly of the electronic timepiece is completed, if the timing rate of the low frequency time signal is either preset in error, or the automatic adjustment is in error, it is difficult to measure the error and make the necessary adjustments to the electronic timepiece circuitry to avoid same. This difficulty is caused, in great measure, by an inability to ascertain the actual rate of the high frequency time standard signal produced by the oscillator circuitry and, additionally, the actual amount of timing rate adjustment effected by the frequency adjustment circuitry. Accordingly, control circuitry for an electronic timepiece that produces a signal representative of the frequency rate of the high frequency time standard signal produced by the oscillator circuitry, and of the amount of adjustment effected by the timing rate adjustment circuitry is desired.